MAX8555A Evaluation Kit
kit also requires two 1.5V power supplies connected at
VIN1 and VIN2 for normal operation.
Note: Each circuit (top or bottom) can be evaluated inde-
pendently by not applying power to the other circuit.
Undervoltage Threshold
The UVP threshold for both circuits on the MAX8555A
EV kit is programmed to 0.75V by external resistors R3
VDD1 inputs low resets the latched fault on the upper
circuit. Cycling the TIMER2 or VDD2 inputs low resets
the latched fault on the bottom circuit.
The overvoltage threshold can be changed by replac-
ing feedback resistors R5, R13, and R14. Use the fol-
lowing equation to select new resistor values:
R 5 = R 6 ?
- 1 ?
and R4 for the top circuit, and resistors R11 and R12
for the bottom circuit. The MAX8555A controller in each
circuit holds the GATE pin low to isolate the input
? OVP
? 0 . 5 V
?
?
R 13 = R 14 = 2 × R 5
power supplies VIN1 and VIN2 from the active VOUT
power bus, if the voltage is below the programmed
UVP threshold. If the voltage at VIN1 or VIN2 drops
below this threshold, the respective MAX8555A con-
troller turns off the MOSFETs by discharging the GATE
pin and asserts a logic-low signal on the corresponding
fault output ( FAULT1 or FAULT2 ). The controller returns
to normal operation and clears the fault if the input volt-
age exceeds the undervoltage threshold. The undervolt-
age threshold can be reconfigured by replacing the
appropriate feedback resistors (R3/R4 or R11/R12). Use
the following equations to select new resistor values:
where OVP is the desired overvoltage threshold and R6
is set to 1k ? . Refer to the Setting the OVP Fault
Threshold section in the MAX8555A data sheet to
select new components values.
Remove resistor R5 and short resistor R6 to disable the
overvoltage-protection function.
Reverse Current
The MAX8555A controller detects reverse current dur-
ing normal operation by monitoring the voltage differ-
ence between VIN1 (or VIN2) and VOUT, using the total
R 3 = R 4 ?
- 1 ?
R 11 = R 12 ?
- 1 ?
? UVP
? 0 . 5 V
?
?
? UVP
? 0 . 5 V
?
?
on-resistance (R DS(ON) ) of both N-channel MOSFETs in
their respective circuits. The two MOSFETs used on
each circuit have a combined on-resistance of 8m ?
(typ). The MAX8555A controllers detect a reverse-cur-
where UVP is the desired undervoltage threshold and
resistors R4 and R12 are typically set between 10k ?
and 50k ? .
The UVP feature can be disabled by connecting the
UVP pin to the VL pin. This can be achieved by remov-
ing the feedback resistors R3/R4 or R11/R12 and
installing a 0 ? resistor at R17 or R18.
Overvoltage Threshold
The OVP signal threshold for both circuits on the
MAX8555A EV kit is programmed to 2V by external
resistors R5 and R6. The MAX8555A controller turns off
the MOSFETs of the respective circuit, asserts a logic-
low signal on the corresponding output fault, and latch-
es the output off when an overvoltage fault condition is
detected. An overvoltage fault condition is detected
only if the voltage at VOUT exceeds this threshold and
the forward-current condition is established. The for-
ward-current condition is defined when both MOSFETs
are on and the voltage drop between the input and the
system bus is greater than 0.01V (typ). A voltage drop
greater than 0.01V is achieved when 2.5A (typ) of cur-
rent is sourced from inputs VIN1 or VIN2 to VOUT (2.5A
x 8m ? of R DS(ON) > 0.01V). Cycling the TIMER1 or
rent fault condition when V OUT -VIN1 (or VIN2) > 0.02V
(typ) after a 4.1ms blanking period, when the gate drive
first turns on. Each circuit detects a reverse-current
fault condition if 2.5A (typ) (2.5A x 8m ? > 0.02V) is
sourced from VOUT to VIN1 (or VIN2). During a
reverse-current condition, the MAX8555A controller
turns off the MOSFETs, asserts a logic-low signal on the
fault output ( FAULT1 or FAULT2 ), and latches the out-
put off.
FAULT Conditions
The MAX8555A EV kit provides two output fault signals,
FAULT1 and FAULT2 , to monitor fault events at the two
circuits on the EV kit board. During an overvoltage,
undervoltage, or reverse-current fault condition, the
corresponding MAX8555A FAULT pin is pulled low and
the GATE pin is discharged to ground, turning off both
MOSFETs. The fault state does not latch during an
undervoltage condition. The MAX8555A latches off dur-
ing a reverse current or an overvoltage fault condition.
Cycling the TIMER1 or VDD1 inputs low resets the
latched fault on the top circuit. Cycling the TIMER2 or
VDD2 inputs low resets the latched fault on the bottom
circuit. See Table 1 for fault-mode descriptions.
_______________________________________________________________________________________
3
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